Senior / Lead RTL Engineer

Job Title: Senior / Lead RTL Engineer 

Position: Permanent 

Location: Barcelona, Spain

Salary Range: DOE

Responsibilities:

We have multiple open positions in our RTL team and we're looking for individuals with either a strong RTL or a strong architecture/microarchitecture background interested in working in several areas of a RISC-V design for an advanced technology node. 

In particular, areas of focus will be the processor pipeline, d-cache, i-cache, the l2-pipeline and a custom memory controller. We believe in very “vertical” engineers that fully understand the problem to be solved and can take it down to RTL level. 

Requirements: 

•  Minimum Bachelor's degree in computer science
• +8 years in the role
• English C1
• Experience in RISC-V Design
• Strong RTL Design
• Strong architecture / microarchitecture background
• Knowledge in Verilog
• Scripting

Get in touch with Jessica@microtech-global.com for more information on this role and similar opportunities